The present invention relates to a timebase error compensation apparatus for compensating the timebase error included in a video signal which is read from a recording medium by an information recording and reproduction apparatus such as a VTR having a plurality of rotary reproducing heads.
When there is a timebase error between horizontal sectors of video signal, the video signal is written to a memory by a clock that has the same timebase error so that it is possible to compensate for the timebase error by reading by a clock without a timebase error.
FIG. 1 shows one example of a timebase error compensation apparatus that compensates for the timebase error of video signal. In the figure, the input video signal is input to an A/D converter 1, and undergoes A/D conversion by the write clock generated by a write clock generator 2 in synchronism with the input video signal. The video signal that has undergone A/D conversion is written to a memory 3 by the write clock and is then read by the reference read clock that is generated by a read clock generator 4, and converted into an analog signal by a D/A converter 5. The read clock is normally using a fixed clock realized by quartz crystal oscillation and so the accuracy of crystal oscillation is stable and so the timebase compensation performance is generally dependent upon the accuracy of the write clock.
The write clock synchronized with the input signals, that is, the write clock that changes its phase corresponding to the timebase error, can be generated by an automatic frequency control (AFC) circuit shown in FIG. 2, for example.
More specifically, a sync separation circuit 6 separates the horizontal sync signal from the video signal, and inputs it to an automatic frequency control (AFC) circuit 7. The AFC circuit 7 is configured from a phase-locked loop (PLL) circuit comprising a phase comparator 8, a loop filter 9, a voltage controlled oscillator (VCO) circuit 10 and a frequency divider 11, and the VCO circuit 10 outputs a clock having the same timebase error as the horizontal sync signal.
The input video signal is input to the memory by this clock and is read out by a clock without a timebase error and so it is possible to obtain an output video signal having timebase error. However, the AFC circuit 7 has the loop band region determined by a time constant and frequency characteristics of the loop filter 9 and so it is not possible to raise the speed of response in order to obtain a stable performance, and therefore it is not possible to follow high-speed time changes.
Here, the AFC circuit changes the phase and the oscillation frequency in accordance with the elongation or contraction of the length of one horizontal scan period, and whereas the clock is phase-synchronized with the input signals, a clock generation circuit shown in FIG. 3, which can take the same phase as the phase within a single horizontal scan period, and which is known as an Automatic Phase Control (APC) method has been used in recent years.
The sync separation circuit 6 separates the horizontal sync signal from the video signal that have been input, and supplies it to a phase detector 12. An oscillator 13 outputs clock signal that has a fixed frequency, and inputs it to a delay circuit 14, which delays it by different predetermined times and generates clock signals of a plural number of phases. These clock signals that have multiple number of phases are supplied to the phase detector 12 and a phase selector 15.
The phase detector 12 compares the phase of the signals that have been input from the sync separation circuit 6 and the phases of the clock signals from the delay circuit 14 and outputs the phase errors that are the results of this comparison, to the phase selector 15. The phase selector 15 selects and outputs the clock signal that has the smallest phase error, in response to the outputs of the phase detector 12.
By this, as shown in FIG. 4, an automatic phase controlled (APC) clock signal is generated, which is syncronized with the horizontal sync signal with its phase being reset every time the edge of the horizontal sync signal comes. Accordingly, as shown in FIG. 5, if signals of each line of the video signal are written to the memory in accordance with the clock signal, then it is possible to compensate for the timebase error. More specifically, if there is a write operation to the memory space while there is a reset by the edge portion of the sync signal, and there is a read operation so that there is reset for each horizontal sector by the reference clock, then the signal after D/A conversion will be correctly reproduced (as shown in FIG. 6A and FIG. 6B).
The following will consider the characteristics for the timebase error compensation for the APC method and the AFC method.
FIG. 7 shows one example of a circuit that is used for the measurement in a timebase error compensation apparatus, and a variable delay line 16 is supplied with a video signal that does not have any timebase error, and a continuous sine wave output from a sine wave oscillator 17 is supplied as a control signal. Accordingly, the input video signal having no timebase variation is elongated and contracted sinusoidally in the direction of the timebase, by the variable delay line 16, and it is supplied to a timebase error compensation apparatus 18. If the ratio of the change components (sine wave components) between the input and the output of this timebase error compensation apparatus 18 is determined, then it is possible to measure the compensation performance of this timebase error compensation apparatus.
FIG. 8 is a graph showing the timebase error compensation performance due to the APC circuit and the AFC circuit, as measured by this method. In the figure, the axis of abscissa is the change component frequency, and the axis of ordinate is the compensation performance (suppression ratio) of the change component due to the timebase error compensation apparatus. More specifically, if the ordinate is less than 0 dB, then it shows that there is a timebase error compensation performance, and if the ordinate is 0 dB or larger, that there is not only timebase error compensation performance but an adverse effect. The solid line shows the timebase error compensation performance due to the APC circuit and the dotted line shows the timebase error compensation performance due to the AFC circuit.
As seen from the figure, in the low region component in the vicinity of 1 kHz or less, the timebase error compensation apparatus using an APC circuit has an improvement effect for the timebase error of from 7 to 8 dB greater than the timebase error compensation apparatus using an AFC circuit is used, and it has a compensation performance up to the vicinity of 3 KHz.
On the other hand, the timebase error compensation apparatus using an AFC circuit does not compensate for timebase error for components having frequencies of approximately 1 KHz or greater, and when compared to the case where an APC circuit is used, it has poorer characteristics.
In general, the change component is less visually conspicuous for the higher the region and there is the tendency for the change component itself to become smaller for the higher the region.
However, even the timebase error compensation apparatus using an APC circuit cannot follow a velocity error which expands and contracts greatly within a horizontal scan period and which is generated at a switching point at which the reproducing heads are switched over in a VTR format for home use. In addition, the switching point changes continuously with a width of several .mu.s or so in response to a tape tension, a low frequency jitter etc. of tape jitter, and the signals of the horizontal scan lines before and after the horizontal scan portion that includes the switching point are sufficient by compensated for the timebase error, and so the error in the horizontal scan line that includes the switching point is especially conspicuous visually.
Because of this, setting the switching point to a horizontal scan line other than a valid scan line on the monitor screen is made so that the disturbance in the image due to the switching point cannot be seen, but with large-screen monitors, the range of the valid scan lines has widened and disturbances in the switching points have come to be seen.
FIG. 9 through FIG. 11 show this condition. More specifically, as shown in FIG. 9, noise appears in the reproduced video signal in syncronism with the edge (switching point) of the drum pulse. As shown in FIG. 10, the error component due to the switching point that appears at the bottom of the screen is not removed by even the timebase error compensation apparatus using an APC circuit, and is output as shown in FIG. 11.